This invention relates to a circuit arrangement for powering an electric motor having at least three windings from a direct voltage source via a commutation circuit which, for each winding terminal of the electric motor, comprises a commutation branch including a first and a second switching element by which the relevant winding terminals can be connected selectively to a first terminal of the direct voltage source or, via a measurement impedance, to a second terminal of the direct voltage source, the circuit arrangement having a ring counter device for periodically changing over the switching elements of the commutation circuit in accordance with a signal series which is cycled through the ring counter device under control of a clock signal, one period of the ring counter device corresponding to one complete cycle of the signal series through the ring counter device, and having a clock frequency generating stage for supplying the clock signal whose clock frequency is dependent on the measurement voltage.
Electronically commutated d.c. motors are known which are equipped with position sensing elements, particularly Hall elements, for the movable armature of the motor. Since these position sensing elements are stationary the angle between the armature voltage and the electromotive force (EMF) of the motor is fixed for all loads. Moreover, such position sensing elements impose undesired limits on the simplification and miniaturization of electronically controlled d.c. motors.
Another improved method for the commutation of the coils of a d.c. motor is obtained if a commutation frequency can be generated in dependence on the motor current. For this purpose, the motor current is measured by means of a series resistor having a low resistance in the supply line to the commutator. In order to draw any conclusions about the (mean) power of the motor from the measurement of the motor current, the arithmetic mean of the voltage measured across the series resistor, i.e. the motor current, is formed. From this mean value of the measured voltage a frequency proportional to this voltage can be derived with the aid of a voltage-frequency converter, the d.c. motor being commutated on the basis of this frequency.
However, it has been found that for the correct operation of such a circuit arrangement, i.e. for the correct commutation of the d.c. motor, the formation of the arithmetic mean for all the motor speeds between standstill of the motor and the maximum speed is very intricate from the point of view of circuit engineering. Commercially available circuits allow, for example, an arithmetic mean formation between two limit frequency values which are in a ratio of 50:1 to one another. If the upper limit frequency is assumed to correspond to the maximum speed of the d.c. motor this results in a range of lower speeds which cannot be handled or at least cannot be handled correctly by means of such an arrangement.
From EP 0 156 282 a method of and an arrangement for controlling a brushless d.c. motor are known, which motor is driven by an inverter circuit connected to a d.c. source. The direct current applied to the inverter circuit is measured. The measurement signal resulting from this measurement is processed to a peak value signal in a peak value detector for the detection of positive current peaks, which signal is applied to a first controller in order to generate a frequency control signal. This controller reduces the value of the frequency control signal when the peak value of the motor current exceeds a given value. From the frequency control signal a clock signal is derived via a voltage-controlled oscillator, whose frequency, via a frequency divider and a ring counter, forms the basis for the commutation of the a.c. motor by means of the inverter circuit. Moreover, a mean value is generated from the measurement signal derived from the motor current and the mean value signal thus generated is divided by the frequency control signal in order to obtain a speed demand signal. Furthermore, a second voltage control signal, which should be a measure of the magnetization of the motor and which corresponds to the negative current peak of the motor current, is derived from the measurement signal in a second peak value detector. From the difference between the speed demand signal and the second voltage control signal a pulse width control signal is derived. In a pulse width control stage (timer) the pulse width of the clock signal from the voltage-controlled oscillator is controlled by means of this pulse width control signal. A logic circuit comprising a plurality of logic gates combines the commutation signals from the ring counter and the timer so as to form control signals for the inverter stage. For the starting phase and the braking phase of the motor the controller, to which the peak value signal from the first peak value detector (positive current peaks) is applied, further has a control input to which a ramp signal is applied from a speed demand input via a ramp generator. This ramp signal reduces the value of the frequency control signal in the starting phase and the braking phase, as a result of which the voltage-controlled oscillator generates a gradually increasing frequency in the starting phase and a gradually decreasing frequency in the braking phase.
This arrangement includes not only the afore-mentioned mean-value forming means with the said drawbacks but also a very large multi-section control loop, which results in a very complicated arrangement. Apart from the consequently greater likelihood of parasitic oscillations, the commutation frequency in the known arrangement is derived from the peak values of the motor current, which itself may already be susceptible to substantial interference and fluctuations.
From DE 37 09 168 A1 a circuit arrangement is known for powering a multiphase synchronous motor from a d.c. mains. This circuit arrangement comprises a switching device for successively connecting the individual winding phases of the armature winding of the motor to the d.c. mains voltage, a switching signal generator for generating switching signals for the switching device, and a logic stage for applying the switching signals to the switching device in the correct sequence. In order to simplify the circuit arrangement, without a rotor position sensor being used, the switching signal generator is formed by a voltage-to-frequency converter, a starting section and restarting unit, which is active once the motor has run up to speed. The voltage-to-frequency converter generates a squarewave pulse series having a pulse repetition frequency, which depends on its input voltage and is raised from zero to a given value by starting of the starting section. The starting section is started upon application of the d.c. mains voltage and by the restarting unit when the motor current exceeds a given value.
In this circuit arrangement the motor speed tracks a frequency which is determined by a fixed voltage and which is independent of the load and the operating condition of the motor. If the motor speed falls out of step with this frequency this operating condition is detected by an increase of the motor current beyond a given limit value. After a given time a frequency which increases gradually from a small value is then applied so as to allow the motor to restart. Controlling in accordance with the measured motor current is not effected.
From DE 37 12 185 a load current detection device for current inverters with pulse width modulation is known. Such a current inverter has a plurality of branches in parallel with a direct voltage source. Each branch has an upper section and a lower section, which each include a switching element. The switching elements of each upper section and of each lower section continuously and alternately receive switching control signals. Shunt resistors are interposed between a negative terminal of the direct voltage source and the switching elements of the lower arms. The current inverter further comprises a nominal current waveform generator, which generates guidance values for the current waveforms to be fed into a load, a carrier wave generator, and sample and hold circuits. Each of the sample and hold circuits samples a voltage produced across the relevant shunt resistor in synchronism with the period of the carrier wave generated by the carrier wave generator, at a given instant during the time interval in which the associated switching element is conductive, and holds this voltage. For this purpose, a reference value signal generator circuit has been provided, which supplies a reference value signal. A comparator circuit compares this signal with the output signal of the carrier wave generator. If the output signal of the carrier wave generator exceeds the output signal of the reference value signal generator circuit, i.e. the reference value signal, the sampled signals are held in the sample and hold circuits.
Thus, in the device known from DE 37 12 185 A1 the currents in the individual branches of the current inverter are measured separately and are controlled separately for each branch by a multiple control loop for each nominal current waveform. This device also requires a complex circuit arrangement.
From the European Patent 231 046 a commutation circuit for a collectorless d.c. motor without commutation sensor is known, which comprises a stator with a multi-phase system and a permanent-magnet rotor. The commutation state of the motor depends on the voltages induced in the stator windings. A comparison signal is generated which indicates whether the sign of that winding voltage which is not connected to a direct current source by means of the electronic switching elements is in conformity with a predetermined sign which depends on the instantaneous commutation state. This comparison signal is inhibited during those time intervals in which transient effects which may cause spurious zero crossings occur in the windings as a result of the electronic switching elements being turned off. The switching elements are always switched one commutation step further if the comparison signal does not have the appropriate signal. The voltage dependent commutation is an alternative for the current dependent commutation, but this is not always desired.